Field of the Invention
The present invention relates to an image processing apparatus.
Description of the Related Art
An example of conventional methods of parallelly executing processes by a plurality of hardware units is a bus pipeline connection method as disclosed in Japanese Patent No. 2734246. According to this connection method, input data is processed in an order in which a plurality of processors are physically connected, and then is output to an external memory or the like from an output terminal. A plurality of processors cannot process data in an arbitrary processing order. To solve this problem, a method of connecting processors by a ring bus is proposed in, for example, Japanese Patent Laid-Open No. 01-023340 and Japanese Patent Nos. 2834210 and 2518293.
There is also proposed a method which employs the concept of a signal flow graph. In this method, a transmission source ID (identifier) is added to data to be sent onto a ring bus so that a processor which has processed the data last can be specified. A subsequent processor waits for the sent data in which the transmission source ID is set, thereby branching the processing flow. The branch of the processing flow will be explained in short.
FIG. 17 is a block diagram for explaining a ring bus processing block including four processing units A to D which process data, and one input/output unit 2108 which inputs/outputs data. In this processing block, a plurality of communication units 2103 to 2107 are connected in a ring shape. Each of the communication units 2103 to 2107 is connected to one of the processing units A to D or the input/output unit 2108. FIGS. 18A and 18B exemplify a signal flow graph indicating the logical connection relation between data processes performed using the processing block of FIG. 17. In the signal flow graph, arrowed lines represent processes which correspond to those in the processing units A to D. Circled nodes represent the logical connection relation between the processes. Each node has an ID. Each of the communication units 2103 to 2107 has a transmission source ID register and waiting ID register. The transmission source ID register stores the ID of a node at the end point of an arrowed line indicating a processing unit connected to the communication unit. An ID stored in the transmission source ID register will be called a transmission source ID. When a connected processing unit performs processing, the communication unit adds its transmission source ID to data and transfers the data to a subsequent communication unit. The subsequent communication unit can specify the processing unit which has processed the transferred data last. The waiting ID register stores the ID of a node at the start point of an arrowed line indicating a processing unit connected to the communication unit. An ID stored in the waiting ID register will be called a waiting ID. When the waiting ID of the communication unit matches a transmission source ID added to received data, the communication unit transfers the data to the processing unit to process it. In this way, the communication unit has the transmission source ID register and waiting ID register. This makes it possible to logically branch the processing flow in the processing block having communication units connected physically in a ring shape. A concrete example when the processing flow does not have a branch and a concrete example when it has a branch will be explained with reference to FIGS. 18A and 18B.
FIG. 18A shows a signal flow graph when the input/output unit 2108 inputs data to the ring bus, and the processing units A, B, C, and D process data sequentially, and the input/output unit 2108 sends the processed data to an external memory or the like. According to this graph, an arrowed line corresponding to the processing unit A is connected from node “1” to node “2”. The communication unit 2104 connected to the processing unit A transfers data received from node “1” to the processing unit A to process it, and transmits the processed data to node “2”. The communication unit 2104 stores “2” in the transmission source ID register and “1” in the waiting ID register.
Similarly, the communication unit 2105 connected to the processing unit B stores “3” in the transmission source ID register and “2” in the waiting ID register. The communication unit 2106 connected to the processing unit C stores “4” in the transmission source ID register and “3” in the waiting ID register. The communication unit 2107 connected to the processing unit D stores “5” in the transmission source ID register and “4” in the waiting ID register.
The communication unit 2103 connected to the input/output unit 2108 stores “1” in the transmission source ID register and “5” in the waiting ID register. After the registers in the communication units 2103 to 2107 are set in a desired processing order, as described above, data processing starts. Then, the following data transfer is done.
The input/output unit 2108 transfers data input from an input terminal 2101 to the communication unit 2103. The communication unit 2103 generates a packet having the received data and the transmission source ID “1” of the communication unit 2103, and transfers the packet to the subsequent communication unit 2104. The communication unit 2104 compares the transmission source ID in the transferred packet with the waiting ID of the communication unit 2104. In this example, these IDs match each other, so the communication unit 2104 inputs the data in the packet to the processing unit A. The communication unit 2104 then generates a packet having the data processed by the processing unit A and the transmission source ID “2” of the communication unit 2104, and transfers the packet to the subsequent communication unit 2105. The processing proceeds in the same way, and the communication unit 2107 transfers, to the communication unit 2103, a packet having the data processed in order by the processing units A to D and the transmission source ID “5”. The communication unit 2103 extracts the data from the packet, and transfers it to the input/output unit 2108. The input/output unit 2108 outputs the data from an output terminal 2102.
FIG. 18B shows a signal flow graph when the processing flow has a branch. In this processing flow, the input/output unit 2108 inputs data to the ring bus. The processing unit A processes the data, the processing units B and C further process the data, and the input/output unit 2108 sends, to the external memory or the like, data obtained by processing the resultant data by the processing unit D. When the processing flow has a branch, as shown in FIG. 18B, the transmission source ID registers and waiting ID registers of the communication units 2103 to 2107 are also set to satisfy a connection relation represented by the graph. More specifically, the communication unit 2103 stores “1” in the transmission source ID register and “4” in the waiting ID register. The communication unit 2104 stores “2” in the transmission source ID register and “1” in the waiting ID register. Each of the communication units 2105 and 2106 stores “3” in the transmission source ID register and “2” in the waiting ID register. The communication unit 2107 stores “4” in the transmission source ID register and “3” in the waiting ID register. By setting the registers in this manner, the processing flow can be branched.
As described above, the processing flow can be branched in the method of connecting processors by a ring bus. In actual image processing such as filter processing, pixels around a pixel of interest are sometimes referred to process the pixel of interest. In this processing, to process pixels positioned near four sides of an input image, pixels outside the input image sometimes need to be referred. If processing is done without referring to neighboring pixels, pixels are deleted from the input image by the width of neighboring pixels referred in filter processing or the like. As a result, the number of pixels of the input image and that of pixels of the output image differ from each other. In this case, a problem readily occurs in image processing because the image needs to successively pass through a plurality of filters having different filter coefficients. This is because, as the filtering count increases, the number of pixels of an image decreases, making it difficult to ensure a valid image range in a final output image. When an input image 2402 undergoes filter processing, a region 2401 (hatched portion) is created outside the input image 2402 based on pixels positioned at the edges of the input image 2402, as shown in FIG. 19. Filter processing is done for an image 2403 obtained by adding the region 2401 to the input image 2402. The region 2401 outside the input image 2402 will be called an auxiliary region. By adding the auxiliary region, even if filter processing consumes the auxiliary region, an output image equal in the number of pixels to the input image 2402 can be obtained.
Japanese Patent Laid-Open No. 63-247858 proposes a method of adding a control code to data, sending the data to a ring bus, and receiving the data in accordance with the control code. With this control code, a plurality of processors can receive data of an overlapping portion, and the receiving processors redundantly send the data of the overlapping portion to the ring bus. The respective processors set the data of the overlapping portion, and separately perform data processes. Japanese Patent Laid-Open No. 2009-151571 proposes a technique of efficiently using a small-capacity internal memory and generating neighboring pixels using input data.